1. Field of the Invention
The present invention generally relates to multi-processor computing systems and more specifically to a method for power optimized multi-processor synchronization.
2. Description of the Related Art
Multi-processor systems conventionally include two or more processors implemented on one or more integrated circuit. The two or more processors are typically configured to independently execute programming instructions. Certain applications require that the two or more processors synchronize operations at specific points in execution, for example to share system resources.
One technique for synchronizing operations between the two or more processors involves a programming construct known as a spinlock. The spinlock is a blocking mechanism that enables one processor at a time to own a lock and have exclusive access to system resources corresponding to the lock. The spinlock mechanism beneficially provides significantly lower latency than other types of locking mechanisms. However, the spinlock mechanism can be very inefficient with respect to power consumption.
A spinlock implements an acquire function, a release function, and a lock variable configured to store the lock state. The acquire function monitors the lock variable residing in a shared memory space accessible to the two or more processors. The acquire function checks ownership of the lock variable and may repeatedly recheck ownership until the lock variable is in an unlocked state. If the lock variable state is locked, then the lock is owned by a different processor and the acquire function must wait (spin) in a loop until the different processor releases the lock by setting the lock variable to an unlocked state.
During conventional execution of the acquire function, the operating system raises the processing priority of the processor to such a level that only external hardware interrupts from I/O devices can interrupt the process of waiting for the lock to become available. Timer interrupts are also typically disabled as the operating system disables thread scheduling during these operations. The acquire function requires an associated processor to execute continuously and with high priority. The acquire function can be tremendously inefficient because it causes the processor to execute the same code repeatedly in a loop, causing cache synchronization among the two or more processors. In a multi-socket processor system, the spinlock acquire function will cause an external signal to be asserted on the inter-processor bus to assert a memory locking signal. Each of these operations is power inefficient and cause excessive power consumption. Additionally, the processor executing the acquire function is also required to maintain cache synchronization for each other processor of the two or more processors that is testing this variable in such a manner that the acquire function consumes additional cache line space as well as requiring intra-processor or inter-processor synchronization on related cache lines. The acquire function executing on one processor not only increases power consumption for that processor but also increases power consumption for one or more additional processors, leading to yet greater net power consumption. The significant processing burden associated with the spinlock acquire function can lead to poor overall power efficiency in multi-processor systems.
As the foregoing illustrates, what is needed in the art is a more power efficient technique for implementing multi-processor synchronization.